Samsung Delays HighNA EUV Adoption to 1nm Node in 2030

Samsung Electronics has announced a significant shift in its semiconductor manufacturing roadmap, delaying the adoption of advanced HighNA EUV lithography tools until its 1nm-class process node, which is expected around 2030. The decision, revealed at the 2026 Next-Generation Lithography Patterning Conference in Korea, represents a strategic pivot from earlier plans to deploy the technology for its upcoming 2nm and 1.4nm nodes.

Chang Min Park, Master VP of Technology at Samsung Electronics, explained the rationale at the conference. "We wanted to apply HighNA EUV to mass production at nodes such as 2nm and 1.4nm, but the technology still requires further improvements," he stated. "We believe HighNA EUV will become necessary from A10 and below, and we are conducting joint development with various partners."

The delay is attributed to the immature supporting ecosystem for HighNA EUV, which includes essential components like specialized masks, pellicles, and photoresists that still require further development. The technology itself presents significant economic and technical challenges. HighNA EUV scanners, which increase the numerical aperture from 0.33 to 0.55 to enable finer...