IBM unveils 0.7nm nanostack chip with 100bn transistors

IBM announced on Thursday, June 25, 2026, that it has developed the world's first semiconductor technology designed for what it calls the 0.7-nanometer, or 7-angstrom, node. This marks the industry's first claimed entry into sub-1nm territory, a long-sought milestone for packing more computing power into smaller spaces.

The breakthrough centers on a new three-dimensional transistor architecture called "nanostack." Instead of arranging transistors side-by-side on a flat plane, the design stacks and staggers them vertically. This approach allows engineers to fit nearly 100 billion transistors onto a piece of silicon the size of a fingernail, which IBM says is roughly double the density of the 2nm chip technology it unveiled in 2021.

According to the company's projections, the new architecture could deliver up to 50 percent higher performance or up to 70 percent greater energy efficiency compared to that previous 2nm generation. The research also demonstrated a 40 percent improvement in scaling for SRAM, the fast on-chip memory critical for demanding artificial intelligence workloads. IBM presented these findings and details of a working CMOS inverter built with the technology at...